We enumerated several non-competitive design goals that we might want to shoot for, and eventually decided on multiprocessing. We enumerated a handful of possible multiprocessing architectures and eventually narrowed it down to two, which we now call fine-grained and coarse-grained. The coarse-grained approach refers to decoding multiple MP3s in parallel, and the fine-grained approach would be one in which a single MP3 could be decoded by multiple processors. Both were specified as modular, scalable message-passing processor networks. We thought that the fine-grained approach would be more interesting, although the coarse-grained approach would be more realistic. We had worries that fine-grained approach would be fundamentally impossible, due to dependencies within the decoding process, but after a cursory examination we concluded (incorrectly) that this apparently was not the case. We ended up choosing to go with the more challenging fine-grained decoding architecture. Our main design goal was modularity: We wanted the system to be trivially expandable to add more processors, increasing decoding power.

Our work got off to a good start, when around mid-semester we came across a static buffer holding information from the previous frame. This meant that we could not split frames arbitrarily among processors, as we had aimed to do; we had the same fundamental problem with the architecture that we earlier feared but judged not to be an issue. Interestingly, due to the lack of mention of this issue in documentation and the obscurity of the code implementing it, it seems that we could not have found this limitation except by finding it the hard way, which is what we did. Realizing that our architecture was not workable as originally conceived, we came up with several options, most notably splitting up MP3s differently; however, these options would have rendered our architecture neither modular nor adaptable nor particularly interesting. Instead, we chose to revert to an architecture which we earlier rejected, namely the coarse-grained parallelism model. We chose this architecture because it best exemplified our original design goal of modularity, used some of the earlier work we had done on communications, and did not make it necessary to change the physical layout of the board.